Implementação de codificador LDPC para um sistema de TV digital usando ferramentas de prototipagem rapida / Implementation of an LDPC encoder for a digital TV system using rapid protoyping tools

AUTOR(ES)
DATA DE PUBLICAÇÃO

2006

RESUMO

This work presents the several phases in the implementation of an LDPC encoder for a digital television system, developed using innovative technologies for rapid prototyping on Field Programmable Gate Array devices - FPGAs. The implemented encoder was based on an eIRA - extended Irregular Repeat Accumulate - LDPC code with codeword-Iength equal to 9792 bits and rate 3/4. The proposed system was developed to work with video streaming over the Internet Protocol- IP. This work is part of a more ambitious project that resulted in the development of an advanced Modulation System for the Brazilian Digital TV System - BTVD

ASSUNTO(S)

field programmable gate arrays error-correcting codes (information theory) fpga codigos de controle de erros (teoria da informação) televisão digital digital television

ACESSO AO ARTIGO

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