A power estimation design for the Altera Nios II processor / Projeto de um estimador de potência para o processador Nios II da Altera

AUTOR(ES)
DATA DE PUBLICAÇÃO

2007

RESUMO

Nowadays, optimization of hardware and software systems does not necessarily mean increasing their computational performance. Due to the popularization of battery-operated embedded systems, energy comsumption has become a very critical issue. Several tools have been created to model, optimize, and estimate energy consumption, allowing power constraints to be achieved. Lately, FPGAs have presented great advancements on density, speed and storage capacity. Such characteristics made possible the implementation of complex systems comprising one or more soft-core processors. This kind of processors allows detailed customization of its architectural features, enabling timinig, and area constraints of a design to be reached. The aim of this work is to build a power estimator to predict the energy comsumption of a software running on the Altera Nios II soft-core processor. The implemented estimation model presented on this dissertation has been tested with several standard benchmarks and the results obtained have proven to be suitable for estimating the energy consumption of a software with a maximum error of 4.78%

ASSUNTO(S)

consumo de energia fpga fpga soft-core soft-core energy consumption estimador de potência power estimator

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