Projeto de um conversor analógico-digital para um receptor Bluetooth em tecnologia CMOS. / Analog to digital converter design for a Bluetooth receiver in CMOS technology.

AUTOR(ES)
DATA DE PUBLICAÇÃO

2010

RESUMO

In this work, an Analog to Digital Converter (ADC) fulfilling the Bluetooth standard specifications is designed. This block stays at the reception side of an integrated wireless transceiver in CMOS technology. Initially, an analysis of the ADC as a system is carried out, at the same time that the specifications at that level are developed. The architecture adapted from the literature is known as time-interleaved pipeline. Its main blocks, the S&H and the basic cell including sub-ADC and MDAC circuits, are then explained together with the digital correction strategy based on the bit of redundancy between consecutive stages. Furthermore, digital gate implementation of previous strategy and generation of the different clock phases required by pipeline chain blocks, are covered. The two most elementary circuits, operational transconductance amplifier (OTA) and voltage comparator, are also presented before introducing geometric programming (PG) as an auxiliary design tool. Such a tool allows the power consumption optimization of these basic circuits and thus leads to a new perspective in analog circuit design for the state of the art. Finally, the reached results and the different ADC block simulations are presented. Those results include tests and measurements of an OTA designed using PG and fabricated in a CMOS 0,35 micrometers technology. The most important conclusion of this work is derived from the joint application of geometric programming and careful analysis of the real circuit requirements, allowing the global performance optimization in the designed ADC.

ASSUNTO(S)

a/d and d/a converters conversores a/d e d/a geometric programming microelectronic microeletrônica programação geométrica

Documentos Relacionados