Exploração de reordenamento de ROBDDs no mapeamento tecnológico de circuitos integrados / Exploration of ROBDD reordering on technology mapping for integrated circuits

AUTOR(ES)
FONTE

IBICT - Instituto Brasileiro de Informação em Ciência e Tecnologia

DATA DE PUBLICAÇÃO

2007

RESUMO

The ROBDDs are structures that have been successfully used in CAD tools for microelectronics. These structures allow canonical representation of boolean functions when established a fixed variable ordering. In the context of an automatic logic cell generator for integrated circuits, ROBDDs may serve as a base for deriving transistor networks from which electrical behavior is equivalent to the logic behavior of a specified boolean function. With ROBDD derived transistor networks, the relative placement of transistors is determined by variable ordering. The effect of transistor reordering was already studied in the nineties and we know about its influence over area, delay and power characteristics of an integrated circuit. However, these studies were limited to complementary series/parallel CMOS topology, which is the standard for transistor networks topology. In this work, the effect of variable reordering is explored over area and delay characteristics of circuits mapped to six different logic families, where cells are designed with ROBDD derived transistor networks. Experimental results indicate that, in general, placing transistors controlled by the most critical signals closer to cell output may lead to a circuit mapping with an average 16.4% less delay than an equivalent circuit where orderings for smallest possible area are selected and input arrival times of a cell are ignored.

ASSUNTO(S)

microeletronica bdds circuitos integrados technology mapping bbds transistor reordering cell generator

ACESSO AO ARTIGO

Documentos Relacionados