Development of Space Vector PWM usin nonorthogonal reference frame for multilevel inverter voltage source in FPGA / Implementação do algoritmo da Modulação Vetorial usando coordenadas móveis não-ortogonais em Field-programmable Gate Array para inversores multiníveis fonte de tensão

AUTOR(ES)
DATA DE PUBLICAÇÃO

2009

RESUMO

This work presents the implementation and analysis of Space Vector PWM algorithm using non-orthogonal moving reference frame for diode clamped multilevel inverter in Field Programmable Gate Array (FPGA). In this algorithm, the non-orthogonal reference voltage is obtained according to the sector where the Reference Voltage (V*) lies. From the triangle identification inside hexagon, the Nearest Three Vector (NTV) are determined using the information of the sector and triangle where V* is located. The duty cycles are calculated by a set of simple equations. The switching pattern is generated through coefficients referred to by the triangle number where V* lies. The softwares Quartus II, ModelSim and MatLab were used to describe the algorithm in hardware description language VHDL, to check, test and simulate work. Fixed point 16-bit signed pattern was used for calculus. A 10 MHz clock is used to obtain the switching time, whereas the PWM works with a 50 MHz clock, in order to improve the PWM generation accuracy. The synchronism between switching time calculation and the PWM signal generation was carried out by a state machine. Altera Cyclone II FPGA Starter Development Kit with EP2C20F484C7N FPGA, was used to generate the V* and develop the proposed algorithm. The results obtained with the DCI threelevel inverter were satisfactory, validating the FPGA algorithm implementation. This algorithm can be extended to topologies of generic-ordered DCI multilevel inverters, very slightly altering its computational efforts.

ASSUNTO(S)

multi-level inverter fpga inversores multiníveis vectorial modulation vhdl engenharia eletrica modulação vetorial

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