A timed Petri net methodology based on area estimator for hardware/software co-design systems environments / Uma metodologia para estimativa de Ãrea baseada em redes de Petri temporizadas para ambientes de sistemas de hardware/software co-design

AUTOR(ES)
DATA DE PUBLICAÇÃO

2004

RESUMO

Most modern electronic systems consist of dedicated hardware and programmable components (called software components). Over the last few years, the number of methodologies that concurrently apply design techniques from different areas to develop mixed hardware/software system has been growing considerably. The concurrent design of mixed hardware/software systems has shown to be advantageous when considered as a whole instead of considering as independent entities. Nowadays, the electronic market demands high-performance and low cost systems. These requirements are essential for the market competitiveness. Furthermore, a short time-to-market is an important factor. The delay in product launching causes serious profit reductions, since it is much simpler to sell a product if you have little or no competition. It means that facilitating the re-use of previous designs, faster design exploration, qualitative analysis/verification in an early phase of the design, prototyping, and the reduction of the required time-to-test, reduce the overall time required from a specification to the final product. When designing such mixed hardware/software system, the analysis of design alternatives and the decision of where to implement each part of system, that is, in hardware or in software, are very important tasks. The estimation of quality metrics permits design space exploration and may guide the decision of the implementation media of a systemâs parts. Such metrics are calculated at system level, or rather, without real implementation. Hence, such estimations also speed up a systemâs design and permit the analysis of design constraints, providing a quick feed-back for design decisions. Petri nets are a formal specification technique that allow for a graphical, mathematical representation and have powerful methods which allow designers to perform qualitative and quantitative analysis. Timed Petri nets, are Petri nets extensions in which the time information is expressed by duration (determinist timed net with three phase policy firing semantics) and is associated to the transitions. For a given high-level behavioral description, the hardware design is divided into classes of functional blocks: data-paths and controllers. The datapath consists of three kinds of RT components: storage units (such as registers and latches), functional units (such as ALUS and comparators), and interconnect units (such as multiplexers and buses). Storage units are required for holding data values by the constants, variables and arrays in the behavior. Functional units are needed to implement the operations in the behavior. After all the variables and operations in the behavior have been mapped to storage and functional units, we can estimate the number of interconnect units, such as buses and multiplexers, which are required for interconnecting the storage and functional units. This work proposes an approach to estimate the hardware area based on the number of storage, functional and interconnect units, taking into account timing constraints and the data-dependency, and extends some previous works aiming improving the accuracy area estimation methods. That is, the proposed method considers an data-flow net that captures data-dependency for calculating the area of the data-path based on the number and type of its components, considering temporal dependence relation

ASSUNTO(S)

estimativas hardware/software co-design dependÃncia de dados storage units intermediate model caminho de dados unidades funcionais ciencia da computacao hardware/software co-design unidades de armazenamento timed petri nets redes de petri data-path functional units redes de petri temporizadas data-dependency estimates unidades de interconexÃo modelos intermediÃrios petri nets interconnect units

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